1. Field of the Invention
The present invention relates to electronic circuitry and more particularly to trimming circuitry suitable for use with a variety of precision integrated circuits.
2. Prior Art
Most precision integrated circuits such as digital to analog converters or low off-set operational amplifiers require close matching of tolerances among resistor components. To manufacture integrated circuits having such close tolerances requires that devices be screened for tolerance mismatch, and that those devices which fall outside the tolerance range be discarded.
Since it is difficult to control and therefore to match resistor component values in the basic manufacturing processes, the yield achieved by screening and discarding alone would be unacceptably low, and would result in device costs which are prohibitive. To avoid this loss, it is common to trim critical elements after manufacture, to up-grade devices which might otherwise fall outside the required tolerance range to performance within acceptable tolerances.
A widely used method of trimming resistor elements on an integrated circuit utilizes a laser beam to modify resistor element values, as is well known. This method is well documented in the literature by, for example, S. Harris and D. Wagner, "Laser Trimming on the Chip", Electronic Packaging and Production, pp. 50-56, February, 1975 and Grebene, Alan: "Bipolar and MOS Analog Integrated Circuit Design", John Wiley and Sons, 1984, Chapters 2 and 3.
An alternative method, also well documented, employs fusible links to trim resistive elements on an integrated circuit. See, e.g.: G. Erdi : "A precision Trim Technique for Monolithic Analog Circuits", IEEE Journal of Solid State Circuits, Vol. SC-10 No. 6, December 1975, 412-416 and A. Grebene: "Bipolar and MOS Analog Integrated Circuit Design", John Wiley and Sons, 1984, Chapter 2 and 3. This method is generally utilized in applications requiring a limited number of trims or a limited trim range. This is because the area required to create each fusible link element must be permanently designed into the integrated circuit and can cause the overall size of a circuit which contains fusible link trimming to become much larger than the equivalent untrimmed design.
In the most rudimentary form of fusible link trimming, each fusible link is controlled by a single metal conductor which is accessed on the integrated circuit chip by a metal "pad" on the periphery of the chip. The physical size of the pad must be sufficiently large to allow connection to a "probe" terminal which is normally placed in contact with the pad during wafer test. A typical size for the metal pad is 0.004 inches square. In applications which require several trims, the entire periphery of the I.C. chip may become dominated by the trim pads, which can greatly effect the final chip size and hence dominate the final cost of the integrated circuit.
Attempts to utilize other techniques to create access to multiple fusible link elements have been successful to some extent, see, e.g., D. Comer, et al, Selectable Trimming Circuit for use with a Digital to Analog Converter, U.S. Pat. No. 4,138,671, issued Feb. 6, 1979, and D. Comer, A Monolithic 12-Bit Digital to Analog Converter, IEEE Transactions on Circuits and Systems, CAS-25, 504-509, July 1978. However, the extra circuitry required to gain access to each of several links nevertheless requires an undesirably large area to be utilized on the I.C. chip, either as bond pads or as special decoding circuitry.